in Collaboration with
True Insight of Semiconductor Design
TEJAS, a VLSI training program affiliated with CEC IIT Roorkee and conducted by India's leading VLSI education institution, VLSI industry stalwarts, offers a unique semiconductor training curriculum. TEJAS provides a comprehensive learning experience integrating theory and practical skills. Students benefit from industry-led instruction, gaining expertise in VLSI design and technology essential for success in the semiconductor industry. The program emphasizes hands-on learning, critical thinking, and problem-solving, preparing participants to tackle real-world challenges and contribute effectively to technological innovation.
Tejas, a distinctive semiconductor training curriculum developed by CEC IIT Roorkee and VLSI industry stalwarts, aims to equip aspiring engineers with expertise in cutting-edge front-end and back-end VLSI technologies.
By offering a chance to steal an enticing six-digit salary package by the end of the course, we aspire to inspire individuals to pursue their aspirations and carve a path toward becoming future leaders in the industry.
TEJAS, Program Certificate by CEC IIT Roorkee
Internship Certificate by Truechip Solutions
Certificate course in collaboration with CEC IIT Roorkee
Opportunity to intern overseas
Training with 24x7 support By Truechip Solutions
Personalized 1:1 mentoring
Flexible course schedule
Assured 6 digit salary association with industry partners
Free access to a Learning Management System worth $300
Engage in 3+ live projects and live case studies
Assistance By Truechip Solutions
Access to VLSI industry-leading tools
Opportunity to attend conferences globally
To gain hands on insights
Saurabh Gupta is an innovative and accomplished Design Manager at Truechip Solutions, with over 8 years of hands-on experience in the semiconductor industry. Specializing in Front-End Verification, he is a master of System Verilog and UVM methodologies, driving the success of complex ASIC development projects. He holds a B.Tech in Electronics and Communications from Deen Bandhu Chotu Ram University, solidifying his strong technical foundation. Formerly a Scientist at ISRO, Saurabh’s innovative mindset and technical prowess shine through.
Shashi Kant Sharma is a distinguished Knowledge Associate at Futurewiz, bringing over 13 years of dynamic experience across academia and industry. Renowned for his mastery in digital design methodologies and hardware description languages, he holds an M.E. (Gold Medal) from Panjab University, Chandigarh. Shashi excels in front-end VLSI design and verification, with advanced proficiency in Verilog, System Verilog, and UVM. His expertise and hands-on approach make him a key figure in shaping future VLSI professionals.
Prof. Nagendra P. Pathak is a HOD and faculty member at the Indian Institute of Technology (IIT) Roorkee, where he is involved in research and teaching in areas related to Electronics and Communication Engineering, Computer Science and Engineering, Microelectronics & VLSI Technology. He has contributed to various projects and publications, focusing on sustainable development, hydrology, VLSI Engineering and water management. His work often emphasizes the importance of integrating technology.
TEJAS welcomes applications from diverse backgrounds, catering to individuals with varied aspirations and career goals in the realm of VLSI Chip Design. Whether you're a recent graduate or a seasoned professional seeking career advancement, TEJAS provides a platform for rich career growth and an abundance of learning.
If you aspire to excel in VLSI Chip Design and are committed to honing your skills, TEJAS is the ideal program to realize your ambitions and unleash your potential. Apply now to embark on a rewarding journey towards becoming a proficient VLSI professional.
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Develop abilities that are applicable to the industry as you advance in the field of VLSI Chip Design engineering.
360+ Hours of Learning
15+ Case Studies and Assignments
70+ Live Session
11+ Coding Assignments
Introduction to Digital Electronics
Universal Logic Elements
Combinational Circuits - Design and Analysis
Sequential Circuits - Design and Analysis
Finite State Machine, Memories and PLD
Introduction to C Programming
Functions in C
Hands on Experience on C programming
Concepts of Class and Objects
Inheritance, Polymorphism
Introduction to Verilog HDL
Data Types & Operators
Various Abstraction Levels
Concepts of FSM in Verilog
Advance Topics in Verilog
Introduction to SV and Testbench
Functions, Tasks and Procedural Statements
Randomization and Constraint
Assertion and Coverage
UVM and TB architecture
Various Blocks of UVM
UVM Phases and UVM Factory
UVM TLM Overview
PLD, CPLD and FPGA Overview
FPGA Architecture
Netlist and Timing simulation
Components of Linux system
Utilities and Commands
Vi Editor
MOS Characteristics
CMOS circuit design
Transistor sizing and Layout, Stick Diagrams
CMOS Processing Steps
Industry Expert lecture On Protocols
RTL Designing
Verification Using System Verilog
"TEJAS stands out with its emphasis on practical learning and exclusive experiences. Our campus immersion program at CEC IIT Roorkee epitomizes this approach. Over two weeks, students engage in hands-on sessions, gaining practical experience with VLSI tools. The comprehensive course curriculum ensures in-depth knowledge and concept clarification. In the final week, students return to CEC IIT Roorkee for real-world application, exploring VLSI, semiconductors, and chip design in an industry setting under expert guidance. This unique experiential learning equips students with practical skills and industry insights, preparing them for success in the field of VLSI engineering.
Our recruiting partners-the Semiconductor worlds "Who's who " is in our placement list! Get placed with assistance from our strong placement cell which has strong tie-ups with the industry!
Skilled mentors, counselling sessions, interview preparations all progress you to your new job! 100+ satisfied Futurewiz students successfully working in semiconductor companies.
*All trademarks belong to their respective owners.
The application process consists of three simple steps. Candidates have to submit their application.
An offer of admission will be made to the selected candidates, and their application will be accepted upon the payment of the admission fee.
Tell us a bit about yourself and why you want to join
Clear the Aptitude, Digital & C Language based admission test and have a personal interview with our interview panel
Shortlisted candidates would be offered with the admission letter
in Collaboration with
Tejas, a distinctive semiconductor training curriculum developed in collaboration with India's most trusted education centers, CEC IIT Roorkee and VLSI industry stalwarts, aims to equip aspiring engineers with expertise in cutting-edge front-end and back-end VLSI technologies.